Difference between revisions of "CMOS backplane"

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A CMOS backplane is also known as an LCOS backplane.
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A CMOS backplane is a substrate that has been patterned with transistors.
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In LCOS manufacturing, it is also known as an LCOS backplane.
  
 
[[GDSII]] data is used for the IC design of LCOS. (lcos mask layout)<ref name="n377">{{cite web | title= | url=https://tfcg.elis.ugent.be/publi/docvdsteen/docvdsteen.pdf | access-date=2024-05-14}}</ref>
 
[[GDSII]] data is used for the IC design of LCOS. (lcos mask layout)<ref name="n377">{{cite web | title= | url=https://tfcg.elis.ugent.be/publi/docvdsteen/docvdsteen.pdf | access-date=2024-05-14}}</ref>

Revision as of 08:35, 19 August 2024

A CMOS backplane is a substrate that has been patterned with transistors.

In LCOS manufacturing, it is also known as an LCOS backplane.

GDSII data is used for the IC design of LCOS. (lcos mask layout)[1]

References